| Item | Process Project | Capabilities |
|---|---|---|
| Materials | HDI board material type | RCC (65T & 100T), LDPP (IT-180A 1037 and 1086), and ordinary PP 106 and 1080 |
| High Tg FR-4 (halogen-free) | Shengyi S1165, Jiantao HF-170 | |
| Standard Tg FR-4 (halogen-free) | Shengyi S1155, KB-6165G | |
| High CTI | Shengyi S1600L, KB6165GC, KB-6169GT | |
| High Tg FR-4 | FR408, FR408HR, IS410, FR406, GETEK, PCL-370HR; S1000-2, S1000-2M, IT180A, IT-150DA; N4000-13, N4000-13EP, N4000-13SI, N4000-13EP SI; Megtron4, Megtron 6/7/8 (Panasonic); EM-827(Taikwang);GA-170 (Macro N); NP-180 (Nan Ya); TU-752, TU-662(TUC); | |
| Standard FR-4 | Shengyi S1141,S1000H\ ITEQ IT158\Kingboard KB-6160, KB-6165 | |
| Ceramic-Filled High-Frequency Materials | Rogers 4 series (RO4350B, RO4003, RO4725, RO4730), Shengyi (SJ9033, SJ9036) | |
| Ceramic prepreg | RO4450F/F, SJ930B, SJ936B | |
| PTFE High-Frequency Materials | Rogers (Arlon) series, Taconic series, Taizhou Wangling F4BM/TP series, Shengyi, Guoneng, Ruilong, Zhongying, Jinyao | |
| PTFE prepreg | Rogers 6700, Taconic FR-28, RT6002 | |
| Hybrid Lamination | Rogers (Arlon), Taconic, Nelco, Shengyi SJ and FR-4 (containing RO4350 partial mixing) | |
| Structure Type | Standard Structures | Backplane, multi-layer buried blind vias, embedded/buried copper blocks, power supply thick copper, back drilling, stepped grooves, metal edging, countersunk holes, POFV, controlled depth drilling, crimp holes, stepped plates |
| Blind/Buried Via Board Types | Pressing the same surface ≤ 3 times | |
| Surface Finish | Surface Finish Type | HASL with lead , HASL lead free ,Plated Ni/Au (Base Copper Thickness ≤2 oz),ENIG, Immersion Tin, Immersion Silver(Ag), OSP, Hard Gold,Plated Soft Gold, ENIG + OSP, ENEPIG, EPIG |
| HASL | 0.4 µm leaded HASL on large solder pads, 1.5 µm HASL lead-free on large solder pads | |
| Pattern Plated Cu/Ni/Au | Nickel thickness: ≥3μm; Gold thickness: 0.025-0.1μm | |
| ENIG | Nickel thickness: 3-8μm; Gold thickness: 0.025-0.075μm | |
| Immersion Tin | 0.8-1.5μm | |
| Electroplated Tin | 2-10μm | |
| Immersion Silver | 0.1-0.4μm | |
| Electroplated Silver | 0.1-5μm | |
| OSP | 0.2-0.4μm | |
| Hard Gold(with cobalt) | 0.05-4.0μm | |
| Plated Soft Gold | 0.05-2.0μm | |
| ENEPIG | Nickel: 3-8μm; Palladium: 0.05-0.15μm; Gold: 0.05-0.1μm | |
| EPIG | Palladium: 0.05-0.15μm; Gold: 0.05-0.1μm | |
| Solder Mask Thickness | Carbon mask | 8-20um |
| Solder Mask | 10-18um (copper surface capping ink), 5-8um (via capping ink), ≥5um at circuit corners (one-time printing, copper thickness below 48um) | |
| Blue Tape | 0.20--0.80mm | |
| Standard Holes | Mechanical hole diameter (finished) | 0.125-6.5mm (corresponding drill bit diameter is 0.15-6.5mm) |
| A. PTFE material and mixing process: minimum finished hole diameter 0.2mm (corresponding drill bit 0.25mm) | ||
| B. Mechanically buried blind hole diameter ≤ 0.30mm (corresponding drill bit ≤ 0.40mm) | ||
| C. The diameter of the hole for the green oil plug in the pan should be ≤0.55mm (corresponding to a 0.6mm drill bit). | ||
| D. Minimum hole diameter: 0.35mm (corresponding to a 0.4mm drill bit) | ||
| E. Minimum finished metallized half-hole diameter: 0.30mm (corresponding to a 0.35mm drill bit) | ||
| Minimum Track/Spacing for PTH Layer | 3/3 mil (line to line); 3/3 mil (line to disk, disk to disk) | |
| Lamination Cycles for PTH Layer | ≤3 times | |
| Drill-to-Board Thickness Ratio | Maximum thickness-to-diameter ratio for plated through-hole (PTH): 20:1 (when the cutter diameter is ≥ 0.15mm) | |
| Hole Position Tolerance (vs CAD Data) | ±2.5mil | |
| PTH Hole Diameter Tolerance | ±3mil | |
| Press-fit Hole Diameter | ±2mil | |
| NPTH Hole Diameter Tolerance | ±2mil (limits +0/-2mil or +2/-0mil) | |
| Finished Resin-Filled Hole Size | 0.1-0.9mm (corresponding to a drilling depth of 0.15-1.0mm) | |
| Maximum Aspect Ratio of Resin-Filled Hole(Plate thickness/Drilling) | 20:1 | |
| Minimum Track/Spacing of Resin-Filled Hole | 3/4 mil (line to line); 3/3.5 mil (line to disk, disk to disk) | |
| Maximum Aspect Ratio of Through Hole | 20:1 | |
| Max Depth-to-Diameter Ratio (Blind Hole, Mechanical Drill) | 1.3:1 (aperture ≤ 0.20 mm), 1.15:1 (aperture ≥ 0.25 mm) | |
| Minimum Depth for Mechanical Back Drill | 0.1mm | |
| Back Drill Hole Diameter | 0.4-6.5mm | |
| Dielectric Thickness from Target Layer to Adjacent Layer (Back Drilling) | Interlayer Dielectric Thickness for Back Drilling | ≥0.15mm |
| Back drill depth accuracy tolerance | ±0.075mm | |
| Irregularly-shaped hole | Tooling Type | Special drill bits: 82°, 90°, 120°, 135° (tapered hole drill bit diameter range 0.3-10mm) |
| Tapered / Stepped Hole Angle & Diameter | Standard drill bits: Angle 130° (drill diameter ≤ 3.175mm), Angle165° (drill diameter 3.175-6.3mm) | |
| Stepped / Tapered Hole Angle Tolerance | ±10° | |
| Stepped / Tapered Hole Opening Diameter Tolerance | ±0.15mm | |
| Stepped / Tapered Hole Depth Tolerance | ±0.10mm | |
| Irregular Slot Tolerance (Routing) | ±0.10mm | |
| Controlled Depth Routing Accuracy (NPTH) | ±0.10mm | |
| Minimum Tolerance for Drilled Slots | NPTH slot: when slot length/width ≥2, tolerance ±0.05 mm (both length & width); | |
| PTH slot: when slot length/width ≥2, tolerance ±0.075 mm; when 1.5 ≤ slot length/width <2, tolerance ±0.10 mm | ||
| Minimum Tolerance for Routed Slots | NPTH: ±0.10 mm (slot width & length); PTH: ±0.13 mm (slot width & length) | |
| Minimum Pad Size (Inner / Outer Layers) for Laser Vias | 10 mil (for 4 mil laser via), 11 mil (for 5 mil laser via) | |
| Minimum Pad Size (Inner / Outer Layers) for Mechanical Vias | 14 mil (for 8 mil drill) | |
| Pad (Annular Ring) | Minimum BGA Pad Diameter | 6mil |
| Pad Diameter Tolerance | ±0.05mm | |
| Trace Width/Space | Inner layer | 1/3oz, 1/2oz: 2.5/3.0 mil |
| 1oz: 3/4 mil | ||
| 2oz: 4/5 mil | ||
| 3oz: 5/8 mil | ||
| 4oz: 6.5/11 mil | ||
| 5oz: 7/13.5 mil | ||
| 6oz: 8/15.5 mil | ||
| 7oz: 9/18 mil | ||
| outer layer | 1/3oz: 2.5/3 mil | |
| 1/2oz: 3.0/3.0 mil | ||
| 1oz: 3.5/3.5 mil | ||
| 2oz: 6/7 mil | ||
| 3oz: 7/10 mil | ||
| 4oz: 8/13 mil | ||
| 5oz: 9/15.5 mil | ||
| 6oz: 10/18.5 mil | ||
| 7oz: 11/22 mil | ||
| 8oz: 12/26 mil | ||
| Spacing Design | Minimum Distance from Mechanical Drill to Conductor (Non Blind/Buried Via & 1st-order Laser HDI) | 5.5mil(≤8层),6.5mil(10-14层),7mil(>14层) |
| Minimum Distance from Routed Board Edge to Outer Layer Trace (No Copper Exposure) | 8mil | |
| V-CUT Center Line(No Copper Exposure) to Inner/Outer Layer Circuit (H = Board Thickness) | 1.0 < H ≤1.6mm:0.36mm(20°),0.4mm(30°),0.5mm(45°) | |
| 1.6< H ≤2.4mm:0.42mm(20°),0.51mm(30°),0.64mm(45°) | ||
| 2.4≤H≤3.0mm:0.47mm(20°),0.59mm(30°),0.77mm(45°) | ||
| Minimum Inner Layer Isolation Strip Width | 8mil | |
| Minimum Distance from Routed Board Edge to Inner Layer Trace (No Copper Exposure) | 10mil | |
| Minimum Distance from Gold Finger Chamfer to TAB | 6mm | |
| Minimum Spacing between Vias of Same Net | 6mil (through hole), 8mil (mechanical blind via) | |
| Minimum Spacing between Vias of Different Nets | 12mil | |
| Minimum Pad Spacing (ENEPIG) | 3.5mil (corresponding to base copper of 12um and 18um) | |
| Minimum Spacing Between Gold Fingers | 5mil | |
| Minimum Spacing for HASL Pads (Without Solder Mask) | 7mil (10mil isolation between large copper pads) | |
| Minimum Clearance Between Blue Blue Tape and Pads | 14mil | |
| Minimum Clearance Between Silkscreen and Pads | 5mil (silk screen printing), 4mil (printing process) | |
| Minimum Clearance Between Carbon Mask Areas | 13mil | |
| Ceramic Substrate Design | Layer Count | 1~2 Layers |
| Finished Size Range | Max: 140 x 140 mm; Min: 5 x 5 mm | |
| Metal Surface Finishes | OSP, ENIG, Immersion Silver, Immersion Tin, ENEPIG, EPIG | |
| Ceramic Dielectric Thickness | 0.2 / 0.25 / 0.3 / 0.381 / 0.5 / 0.635 / 0.8 / 1.0 / 1.2 / 1.5 mm | |
| Copper Thickness | 35 μm, 60 μm, ≥150 μm | |
| Ceramic Materials | LTCC, HTCC, DBC, DPC (AlN, Al₂O₃) | |
| Thermal Conductivity | 24–220 W/m·K | |
| Embedded / Buried Copper Block PCB Design | Copper Block Size | 3*3mm-70*80mm |
| Copper Block Height Tolerance | ±25um | |
| Minimum Distance from Copper Block to Hole Wall | ≥12mil | |
| Embedded / Buried Copper Block Thickness | 0.3-3.0mm | |
| High-precision PCB Basic Parameters | Minimum thickness of inner layer | 0.05mm (non-buried blind hole plate), 0.13mm (buried blind hole drilling) |
| Layer Count | 1-40 Layers | |
| Board Thickness | 0.2-7.0mm | |
| Minimum finished product size | 2*2mm | |
| Maximum finished product size | Single-sided PCB and double-sided PCB: 600*1200mm Multilayer PCB: 560*1150mm | |
| Interlayer alignment | ≤4mil (8 floors or less) | |
| Board thickness tolerance | Board thickness≤1.0mm:±0.1mm | |
| Board thickness>1.0mm:±10% | ||
| Special Board Thickness Tolerance (no layer structure constraints): ≤2.0mm slabs: ±0.1mm; 2.1-3.0mm slabs: ±0.15mm; 3.1-7.0mm slabs: +/-0.25mm. | ||
| Forming Design Parameters | Impedance tolerance | Single-ended: ±5Ω; Differential: ±5Ω |
| Outline Dimension Tolerance | ±0.05mm | |
| Outline Position Tolerance | 0.075mm | |
| Maximum Warpage Capability | 0.50% | |
| Maximum Finished Copper Thickness (Inner/Outer Layers) | Inner layer: 10oz; Outer layer: 20oz | |
| Minimum Insulation Thickness | 2mil | |
| Minimum Silkscreen Track & Height |
4 mil width / 23 mil height (12 μm, 18 μm base copper) 5 mil width / 30 mil height (35 μm base copper) 6 mil width / 45 mil height (70 μm base copper) |
|
| Minimum Internal Corner Radius | 0.3mm | |
| V-CUT Angle Tolerance | ±5° | |
| V-CUT symmetry tolerance | ±4mil | |
| V-CUT residual thickness tolerance | ±4mil | |
| V-CUT board thickness | For substrates with a thickness (excluding outer copper) ≥ 0.4mm, the finished board thickness ≤ 3.2mm. For substrates with a thickness ≤ 0.6mm, single-sided V-cut is preferred. | |
| PCB Forming Method | Milling the outline; V-cut; bridging; stamp perforation | |
| Gold finger chamfer angle tolerance | ±5° | |
| Gold finger chamfer thickness tolerance | ±5mil | |
| Solder Mask Design Parameters | Minimum Solder Mask Bridge Width | Base copper ≤1 oz: 4 mil (green), 5 mil (other colors), 6 mil (over large copper areas) |
| Base copper 2-4 oz: 20 mil | ||
| Minimum Solder Mask Opening (Single Side) | 2 mil (local minimum 1.5 mil allowed) | |
| Minimum Distance from Solder Mask Opening to Trace | 3 mil | |
| Minimum Solder Mask Clearance to Non-Plated Hole | 6mil | |
| Solder Mask Colors | Green (matte), Yellow, Black (matte), Blue, Red, White, Purple, Transparent, Gray | |
| Silkscreen Colors | White, Yellow, Black | |
| Test parameters | Minimum Continuity Test Resistance | 10Ω (Four-wire test: 0.3mΩ) |
| Maximum Insulation Resistance | 100 MΩ | |
| Maximum test voltage | 300V |